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JEOL USA Semiconductor Equipment Documents

45-nm Gate Length CMOS Technology and Beyond using Steep Halo

45-nm CMOS devices with a steep halo using a high-ramp-rate spike annealing (HRR-SA) are demonstrated with drive currents of 697 and 292 uA/um for an off current less than 10 nA/um at 1.2 V.

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1 7/28/2007 45-nm Gate Length CMOS Technology and Beyond using Steep Halo 265.4 KB

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